The present disclosure relates to semiconductor process technology and devices. In particular, it relates to semiconductor devices with metallic gate electrodes formed by a reaction between a metal and a semiconductor material.
Metal gate electrodes are expected to be used in future complementary metal-oxide semiconductor (CMOS) devices in order to address depletion issues of a semiconductor gate electrode and to promote compatibility of the gate electrode with high-k dielectric materials of a gate dielectric. High-k dielectrics are dielectric materials having a relative dielectric constant higher than that of SiO2, typically above 10. For these metal gate electrodes, work function (WF) values of about 4.2 eV and about 5 eV are respectively used for obtaining n-type and p-type gate electrodes in corresponding NMOS and PMOS devices. Metal gate electrodes can be formed by full silicidation (FUSI) of an initial semiconductor gate electrode with a metal in contact therewith. This semiconductor material may be polycrystalline silicon. The metal may be a refractory metal such as W, a noble metal such as Pt, a near noble metal such as Ni, a transition metal such as Ti, or any combination thereof. During this silicidation process, the initial semiconductor gate electrode reacts with the metal and is thereby fully converted into a semiconductor-metal alloy, known as silicide.
Nickel (Ni) fully silicided (FUSI) gate electrodes have recently attracted attention as candidates for metal gate electrodes. Initial studies focused on Ni1Si1 (or NiSi) and the ability to modify the effective work function of NiSi FUSI gate electrodes when formed on SiO2 or SiON gate dielectrics with dopants to obtain either an n-type or p-type work function. Elements such as As, P or B are then incorporated in the NiSi gate electrode. It was found that dopants implanted into the polysilicon gate electrode before silicidation segregate during silicidation to the interface between the gate electrode and the gate dielectric. This dopant segregation resulted in a significant pile-up of the dopants at this interface after full silicidation.
Recently, the focus shifted to include other Ni silicide phases such as Ni2Si and Ni31Si12 to form a fully silicided gate electrode. Compared to a NiSi fully silicided gate electrode, these other Ni silicide phases, with a ratio Ni to Si that is higher than 1, were found to yield a fully silicided gate electrode with a higher work function compared to a NiSi fully silicided gate electrode when formed on a HfSixOyNz dielectric layer. These Ni-rich phases are thus more attractive for fabricating p-type gate electrodes. However, these other Ni-rich silicide phases exhibited no significant work function modulation with dopants when formed on a SiO2 dielectric layer, despite the fact that a similar interfacial pile-up of dopants was observed on the interface between a Ni-rich silicided gate electrode with the gate dielectric in case a SiO2 or HfSixOyNz was used as a dielectric material.
CMOS integration schemes using different Ni silicide phases for respectively n-MOS, e.g. NiSi, and p-MOS, e.g. Ni2Si or Ni31Si12, taking advantage of the differences in work function of these nickel silicide phases on HfSixOyNz, have been demonstrated. J. Kittl et al. discloses in “CMOS Integration of Dual Work Function Phase-Controlled Ni Fully Silicided Gates (NMOS: NiSi, PMOS:Ni2Si and Ni31Si12) on HfSiON”, IEEE electron device letters Vol. 27, No 12 (December 2006), p. 967-968, such an integration scheme for fabricating CMOS devices with different work function for NMOS and PMOS device using different nickel silicide phases for each device type.
The substantial difference in work function among these Ni silicide phases when formed on an HfSixOyNz gate dielectric, and in their work function dependency on doping when formed on a SiO2 gate dielectric also implies the need to control the silicide phase formation in order to ensure good control and uniformity of the resulting device threshold voltages. J. Kittl et al discloses in “Work Function of Ni Silicide Phases on HfSiON and SiO2: NiSi, Ni2Si, Ni31Si12 and Ni3Si Fully Silicided Gates”, IEEE electron device letters Vol. 27, No 1, January 2006, p 34-36, an optimized two-step Rapid Thermal Processing (RTP) nickel silicidation process wherein the reacted Ni to Si ratio was controlled by selecting the thermal budget of the first RTP step thereby allowing the control of nickel silicide phase obtained during the silicidation process.
The applicability of Ni fully silicided gates may be limited, among other factors, by the ability to control the reacted Ni-to-Si ratio and hence to control the resulting silicide phase present at the interface with the gate dielectric, where the silicide phase determines the gate electrode work function. Furthermore, although NiSi is used to fabricate fully nickel silicided gate electrodes, the process window, in terms of as-deposited Ni-to-Si ratio and/or thermal budget of the silicidation process, for forming NiSi is limited.